Recent papers and patents on high resolution digital to analog (D/A) conversion technique have proposed trimmed analog device, reference refreshing cyclic method and dynamic element matching method, etc. However, because of the stringent requirement and the lack of satisfactory algorithm, the conversion rate has not achieved high speed.
In U.S. Pat. No. 4,465,996, Boyacigiller etal proposed a method for error correction. A high accuracy digital to analog converter (DAC), which employs an EPROM to store the error values, was used to correct the errors in the output of a primary DAC. It also corrects the error by an overlapping correction method such that the error of every quantum level can be corrected.
Maio etal proposed a D/A conversion technique (in IEEE Journal of Solid State Circuits, Vol. SC-16, No. 6, Dec. 1981 "An Untrimmed D/A Converter with 14-Bit Resolution"), which features that correction values obtained from an Error Detection Circuit are stored in a RAM after comparing with the output of a Ramp Function Generator and the main DAC. In normal operation when there are input data, the corresponding correction is fetched from the RAM and then sent to a sub-DAC for correcting the output of the main DAC.
Both these methods have shortcomings. Boyacigiller's method is not automatic. Maio's method has the following drawbacks: (1) the self-calibration is not easy to accomplish; (2) an offset must be added to allow for additive and subtractive correction; (3) correction time for compensation is long; (4) the linearity of sub-DAC and Ramp Function Generator must match exactly.